Vandaris Counter-UAS · Interceptors

Notional airframe and simulation design targets.

This page documents the integrated platform research layer: Gen-1 airframe FEA concepts, simulation design parameters, SITL validation footage, and experimental progress. Parameters are design targets—not qualified field specifications.

Gen-1 airframe FEA · sim only
Gen-1 interceptor concept — finite element stress / heat map from simulation
Stress visualization from structural simulation — not flight hardware

Gen-1 airframe FEA concept.

A notional high-agility interceptor airframe studied in simulation—stress and load paths visualized for structural iteration against intercept-class loads.

FEA / concept render only—not field flight test. Interactive digital twin also on the autonomy page.

> SITL SIMULATION // ASSET: IC-001 // STATUS: INTERCEPT SCENARIO COMPLETE

One integrated autonomy stack—not a kit of parts.

Platform research spans perception, guidance, and closed-loop control in simulation—studying counter-UAS and ground-target tracking scenarios with notional airframe concepts for future academic publication.

Autonomy research
A

Perception

GPS-denied vision research—pixel-error tracking from camera frames. Sim IBVS loop live on the autonomy page; Pi 5 bench for detection + Δx/Δy.

B

Autonomous guidance

Closed-loop terminal guidance for simulated intercept trajectories—aerial and ground-target scenarios—without continuous operator control per run.

C

Platform concept

Notional high-agility airframe model for closed-loop guidance simulation against maneuvering UAS and mobile ground-target trajectories.

Gen-1 design targets.

Notional parameters for simulation and academic research—stated as design targets, not qualified or field specifications.

90mph

Notional speed (sim)

12km

Notional range (sim)

<90s

Time to acquisition (sim)

~30Hz

Control loop design target

Research progress to date

Airframe + twin

Gen-1 FEA here; interactive twin on Autonomy; 5" FPV built for Pi/camera mount.

Vision error pipeline

YOLO + bbox + Δx/Δy from frame center on Raspberry Pi 5. Sim IBVS loop for guidance research.

Iteration speed

Rapid iterative design via HITL / SITL simulation—not multi-year design reviews.

Next milestone

Map Δx/Δy → yaw/pitch (or body-rate) commands and close the loop on the 5" FPV.

Simulation-first iteration within academic research norms.

  • Research focus on autonomy, aerodynamics, and simulation—not slideware.
  • Integrated study: guidance software and notional airframe models developed together in sim.
  • Hardware-in-the-loop IBVS simulator tunes gains entirely within simulation workflows.

Closing the hardware loop from track error to motor commands—counter-UAS and ground-target scenarios—after the Pi vision pipeline is mounted on the airframe.

Open to technical discussions with operators, investors, and potential co-founders. Not selling hardware yet.